Why does the Altera® Advanced Link Analyzer Crash or Produce Incorrect Results on Microsoft Windows 11* 25H2 Virtual Machines?
Description The Altera® Advanced Link Analyzer may crash or produce incorrect simulation results on Microsoft® Windows 11 version 25H2 virtual machines configured with ABI‑based virtual CPU models. This problem occurs because the Intel® Math Kernel Library (MKL) depends on hardware‑faithful x86 CPU execution semantics, which are not fully guaranteed by ABI‑based vCPUs in Microsoft Windows 11 25H2. Resolution To work around this problem, you can configure virtual machines as follows: Microsoft Windows* 11 version 25H2 Use a hardware-faithful vCPU (for example, VMware ESXi* or VMware Workstation* default vCPU) On KVM/QEMU platforms, enable host CPU passthrough Microsoft Windows Server 2022, Windows Server 2025, and Windows 11 version 24H2 or earlier ABI-based virtual CPUs are supported; no changes required Additional Information This problem only affects Microsoft Windows 11 version 25H2 virtual machines using ABI‑based virtual CPU models. Other Windows versions and hardware‑faithful virtual CPUs are not affected.6Views0likes0CommentsWhy do I unexpectedly observe intermittent DDM Errors?
Description Beginning January 10, 2026, executing commands in the terminal or GUI of Quartus® Prime Pro Edition software, Quartus Embedded Edition software or select standalone tools may cause the software or tool to crash with an error similar to the crash signature shown below. This error affects: Quartus Prime Pro Software versions v23.3 through v25.3.1 Standalone Quartus Prime Pro Programmer v23.3 through v25.3.1 Standalone Quartus Prime Pro Embedded Edition v25.3 and v25.3.1 Standalone Quartus Prime Pro Power Thermal Analyzer v25.3 through v25.3.1 This issue is not observed in Quartus Prime Pro Edition versions 23.2 or prior or Quartus Prime Standard Edition. Crash Signature: Error (22912): Unhandled exception: Fatal Error: Assertion failed tools/cpp/ddm/ddm_assessor.cpp:53: DDM_T::verify_token(token) : Cannot identify the client from function assertion_error in tools/cpp/ddm_report/ddm_report_msg.cpp@465 *** Fatal Error: Program termination requested *** *** Below is the stack trace at the time the error occurred. *** The lines beginning "Err Handler" represent frames relating *** to generating this report. *** The point at which the error occurred is somewhere after these lines. *** There may be a few frames representing standard/library code *** before the Quartus frames begin. *** The search for the error should begin with the Quartus frames. *** Unwinder: libunwind *** Stack depth: 15 Quartus 0x24e67: err_terminator() + 0x1bc (ccl_err) Quartus 0xb036a: __cxxabiv1::__terminate(void (*)()) + 0xa (stdc++) Quartus 0xb03d5: (stdc++) Quartus 0xb0628: (stdc++) Quartus 0x1680d: void ddm_throw<DDM_RUNTIME_ERROR>(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> > const&) + 0x26d (ddm_report) Quartus 0x13fae: DDM_REPORT::DDM_ASSERTION_HANDLER::assertion_error(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >) const + 0xde (ddm_report) Quartus 0x12a52: DDM_REPORT::ASSERTION_HANDLER::error(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >) + 0x72 (ddm_report) Quartus 0x13e64: DDM_REPORT::detail::assert_at_line(char const*, char const*, int, char const*, ...) + 0x1b4 (ddm_report) Quartus 0x205fb0: ddm_set_lassessor(DDM_T_ASSESSOR*, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> > const&) + 0x60 (ddm) Quartus 0xf4445: DMS_MANAGER::DMS_MANAGER() + 0x5c5 (dni_dms) Quartus 0xf45b2: DMS_MANAGER::get() + 0x7a (dni_dms) Quartus 0xf6db4: _GLOBAL__sub_I_dms_manager.cpp + 0x58 (dni_dms) Quartus 0x647e: (ld-linux-x86-64) Quartus 0x6568: (ld-linux-x86-64) Quartus 0x202ca: (ld-linux-x86-64) Resolution To work around this problem: For Windows machines Download and unzip the Quartus Prime Pro version zip file that matches your Quartus Prime Pro version from this KDB. Double click on the executable ending in “windows.exe”. When the GUI pops up, press Next. Note that the GUI may look slightly different depending on the version of Quartus you are using. Accept the license agreement Specify the directory where the patch needs to be applied which may be a different location than Quartus install if you have standalone tools in a different directory from your Quartus Prime Pro software installation. Keep “Allow Patch to be uninstalled” selected. Select the software in which to install the patch: The patch will install in the directory of the software or tool you have selected. You will see an uninstall directory for the patch in your software or tool folder where patch is installed; it will contain an executable to uninstall the patch if required for any reason. To confirm patch is installed, you can run quartus_sh -v or corresponding version command for your tool via command line. Alternatively, you can Open Quartus in the GUI and select Help → About Quartus Prime in the main menu. If you are opening up a standalone tool you will navigate to Help-> About <tool_name>. For the Command Line Implementation of the patch in Windows, use the following command: <patch_filename.exe> --mode unattended --installdir <your_install_directory> --accept_eula 1 --patch_to [quartus|qprogrammer|qemb|pta] # An example to patch Quartus Prime Pro Edition Software v25.3: quartus-25.3-0.27-windows.exe --mode unattended --installdir /tmp/altera_pro/25.3 --accept_eula 1 # An example to patch the Standalone Programmer for Quartus Prime Pro Software v25.3: quartus-25.3-0.27-windows.exe --mode unattended --installdir /tmp/altera_pro/25.3 --accept_eula 1 --patch_to qprogrammer For Linux machines: Download and unzip the Quartus Prime Pro version zip file that matches your Quartus Prime Pro version from this KDB. Ensure you run chmod +x on the file ending with linux.run. Run in the command line: ./<installation_patch_run_file>. When GUI pops up, press Next. Note that the GUI may look slightly different depending on the version of Quartus you are using. Accept the license agreement Specify the directory where the patch needs to be applied which may be a different location than Quartus install if you have standalone tools in a different directory from your Quartus Prime Pro software installation. Keep “Allow Patch to be uninstalled” selected. Select the software in which to install the patch: The patch will install in the directory of the software or tool you have selected. You will see an uninstall directory for the patch in your software or tool folder where patch installed; it will contain an executable to uninstall the patch if required for any reason. To confirm patch is installed, you can run ./quartus_sh -v or corresponding version command for your tool via command line. Alternatively, you can Open Quartus in the GUI and select Help → About Quartus Prime in the main menu. If you are opening up a standalone tool you will navigate to Help-> About <tool_name>. For the Command Line Implementation of the patch in Linux, use the following command: ./<patch_filename.run> --mode unattended --installdir <your_install_directory> --accept_eula 1 --patch_to [quartus|qprogrammer|qemb|pta] # An example to patch Quartus Prime Pro Edition v25.3: ./quartus-25.3-0.27-linux.run --mode unattended --installdir /tmp/altera_pro/25.3 --accept_eula 1 # An example to patch the Standalone Programmer for Quartus Prime Pro Software v25.3: ./quartus-25.3-0.27-linux.run --mode unattended --installdir /tmp/altera_pro/25.3 --accept_eula 1 --patch_to qprogrammer This problem has been fixed in Quartus® Prime Pro Edition Software version 26.1. The below table lists the patches that are available and the associated patch number. The patch zip files are attached to the KDB below: Quartus Prime Pro Edition Version Patch Number 23.3 0.52 23.4 0.70 23.4.1 1.01 24.1 0.52 24.2 0.64 24.3 0.35 24.3.1 1.29 25.1 0.36 25.1.1 1.31 25.3 0.27 25.3.1 1.029.4KViews5likes0CommentsWhy ECC protection does not work in F-Tile Dynamic Reconfiguration Suite IP?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 26.1 and earlier, you will observe the Enable ECC protection parameter in the F-Tile Dynamic Reconfiguration Suite IP does not function as expected. Even though you set Enable ECC protection parameter as ON, the ECC protection could not be enabled. Resolution There is no workaround available. This problem is scheduled to be fixed in a future release of the Quartus Prime Pro Edition software.24Views0likes0CommentsWhy do I see configuration failure "Error(18948): Error while sending VOUT_MODE command" if the PMBus Slave device type is set as XDPE12284C or PXE1410CDM_G005 for Agilex® 7 FPGA in Quartus® Prime Pro Edition Software version prior to 26.1?
Description Due to a problem in Quartus® Prime Pro Edition Software version prior to 26.1, when you select the "Slave device type" as XDPE12284C or PXE1410CDM_G005 in the Power Management & VID settings page in your design, you may see the following error while programming SOF file with Quartus® Prime Pro Edition Programmer: Error(18948): Error message received from device: Error while sending VOUT_MODE command Resolution In Quartus® Prime Pro Edition Software version prior to 26.1, if you are using XDPE12284C or PXE1410CDM_G005 as the PMBus Slave device for Agilex® 7 FPGA, select the "Slave device type" as "others" in the Power Management & VID settings page as shown in the table below. Voltage Regulator Slave device type Voltage output format Coefficient Voltage value unit XDPE 12284C (IMVP9 mode) Others Direct m=1, b=-200, r=-1 millivolt PXE1410CDM_G005 Others Direct m=2, b=-490, r=-1 millivolt This problem has been fixed in Quartus® Prime Pro Edition Software version 26.1.10Views0likes0CommentsWhy are there PCIe* functional failures observed after a Configuration via Protocol (CvP) update in Agilex® 7 FPGA devices (R-Tile) CvP designs?
Description Due to a problem in Quartus® Prime Pro Edition software versions 25.3.1 and earlier, when using Configuration via Protocol (CvP) for Agilex® 7 FPGA devices (R-Tile), you may observe PCIe* functional failures after performing a CvP update, as the PCIe interface becomes non-functional. During the CvP update, the FPGA fabric is reconfigured and held in reset, while the PCIe Hard IP is not reset. This issue occurs because the R-Tile RTL is unable to handle the handshaking between the PCIe Hard IP and the fabric after the CvP update. Note that this issue does not cause the PCIe link to go down. This issue affects designs using R-Tile with both CvP and PCIe. Designs using R-Tile without CvP are not affected. This issue occurs in the following flow: CvP Periphery image CvP Initialization CvP Update PCIe activity Issue observed The following sequences will not trigger the problem: A CvP update without PCIe activity after CvP Initialization PCIe activity without a CvP Update after CvP Initialization Resolution To work around this problem, reconfigure the FPGA. Note that this fix may introduce a few seconds of additional delay during the CvP update in the teardown process. This delay occurs after the core.rbf file is transferred during every CvP update. During teardown, the CvP driver polls the CVP_CONFIG_READY bit in the CvP Status Register until CVP_CONFIG_READY equals 0, which accounts for the additional delay. This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 26.1. Related IP R-Tile Avalon Streaming IP for PCI Express Multi Channel DMA IP for PCI Express AXI Streaming IP for PCI Express42Views0likes0CommentsWhy does PTP accuracy error go beyond +/- 1.5ns during dynamic reconfiguration between GTS Ethernet Hard IP and Triple-Speed Ethernet IP in Quartus® Prime Pro Edition version 26.1 and earlier?
Description When using the GTS Dynamic Reconfiguration Controller IP flow in Quartus® Prime Pro Edition version 26.1 or earlier to perform dynamic reconfiguration between the GTS Ethernet Hard IP and the Triple-Speed Ethernet (TSE) IP, the PTP (Precision Time Protocol) accuracy error for the GTS Ethernet Hard IP may exceed ±1.5ns in this scenario. This PTP accuracy problem does not occur with the TSE IP in this case. Resolution No workaround is available so far. This problem is scheduled to be fixed in a future release of the Quartus Prime Pro Edition software.9Views0likes0CommentsWhy does the Single Floating Point Variable Streaming Reverse FFT IP produce an incorrect output when the input order is set to Natural?
Description Due to a problem in the Quartus® Prime Software version 25.3.1 and earlier, the "Natural" option for setting "Input Order" is incorrectly available for selection and unsupported when generating the FFT IP. This option is available when using the following parameters: Direction: "Reverse", Data Flow: "Variable Streaming", Representation: "Single Floating Point". Resolution This problem is scheduled to be fixed in release 26.1 of the Quartus® Prime Software with the removal of the unsupported “Natural” option. Additional Information This problem affects the FFT IP in Quartus® Prime Software versions 17.0 to 25.3.1.12Views0likes0CommentsWhy does Ashling* RiscFree* IDE for Altera FPGAs software version 25.4.1 turns compiler warnings into errors?
Description In the Ashling* RiscFree* IDE for Altera FPGAs software version 25.4.1 (31 st Oct 2025) and later, you might see compilation error related to the following errors: Implicit int types (-Werror=implicit-int) Implicit function declarations (-Werror=implicit-function-declaration) Typos in function prototypes (-Werror=declaration-missing-parameter-type) Incorrect uses of the return statement (-Werror=return-mismatch) Using pointers as integers and vice versa (-Werror=int-conversion) Type checking on pointer types (-Werror=incompatible-pointer-types) This is due to an update in GCC 14 – GNU: Certain warnings are now errors, which affects future GCC versions. For more information, Ashling* RiscFree* IDE for Altera FPGAs software version 25.3.1 (1 st August 2025) is using GCC 13.2. Ashling* RiscFree* IDE for Altera FPGAs software version 25.4.1 (31 st Oct 2025) is using GCC 15.2. Thus, Ashling* RiscFree* IDE for Altera FPGAs software version 25.4.1 (31 st Oct 2025) and future versions are affected. Note that Ashling* RiscFree* IDE for Altera FPGAs software version 25.4.1 (31 st Oct 2025) is paired with Quartus ® Prime Pro Edition software version 26.1. Resolution GNU recommends resolving all the new errors for better code quality. If necessary, you may refer to the workaround – GNU: Turning errors back into warnings. In Board Support Package Editor, add "-fpermissive" in hal.make.cflags_user_flags.15Views0likes0CommentsIs the timing model for Stratix® 10 1SX040, 1ST040, and 1SG040 FPGA devices correct?
Description No, due to a problem in the Quartus® Prime Pro Edition Software v21.2 and earlier, the timing model for Stratix® 10 1SX040, 1ST040 and 1SG040 FPGA devices is not correct. This occurs because the timing model for vertical (C2/C3/C4/C16) routing wires are miscalculated. Errors range from few ps to 50 ps per path, with 150 ps in the worst corner for the worst wire. This problem only affects Stratix® 10 1SX040 (GX/SX H-Tile) / 1SG040 (TX E-Tile) FPGA devices. Resolution To work around this problem for projects using devices 1ST040xxxx (TX E-Tile), download and install the patch according to the versions of your Quartus® Prime Software. Patch 0.60 for Quartus Prime Pro Edition Software v20.1: Quartus® Prime Pro Edition Software v20.1 Solution Patch 0.60 for Windows (.exe) Quartus® Prime Pro Edition Software v20.1 Solution Patch 0.60 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.1 Solution Patch 0.60 (.txt) Patch 0.57 for Intel Quartus Prime Pro Edition Software v20.2: Quartus® Prime Pro Edition Software v20.2 Solution Patch 0.57 for Windows (.exe) Quartus® Prime Pro Edition Software v20.2 Solution Patch 0.57 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.2 Solution Patch 0.57 (.txt) Patch 0.74 for Intel Quartus Prime Pro Edition Software v20.3: Quartus® Prime Pro Edition Software v20.3 Solution Patch 0.74 for Windows (.exe) Quartus® Prime Pro Edition Software v20.3 Solution Patch 0.74 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.3 Solution Patch 0.74 (.txt) Patch 0.43 for Intel Quartus Prime Pro Edition Software v20.4: Quartus® Prime Pro Edition Software v20.4 Solution Patch 0.43 for Windows (.exe) Quartus® Prime Pro Edition Software v20.4 Solution Patch 0.43 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v20.4 Solution Patch 0.43 (.txt) To work around this problem for projects using devices 1ST040xxxx (TX E-Tile) or 1SX040xxx (GX/SX H-Tile), download and install the patch according to the versions of your Intel® Quartus® Prime Software. Patch 0.50 for Intel Quartus Prime Pro Edition Software v21.1: Quartus® Prime Pro Edition software version 21.1 Solution Patch 0.50 for Windows (.exe) Quartus® Prime Pro Edition software version 21.1 Solution Patch 0.50 for Linux (.run) Readme for Quartus® Prime Pro Edition software version 21.1 Solution Patch 0.50 (.txt) Patch 0.30 for Intel Quartus Prime Pro Edition Software v21.2: Quartus® Prime Pro Edition Software v21.2 Solution Patch 0.30 for Windows (.exe) Quartus® Prime Pro Edition Software v21.2 Solution Patch 0.30 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v21.2 Solution Patch 0.30 (.txt) Once the patch is installed, perform the following actions: Save <design>.sta.rpt before running. Run quartus_sta –force_dat <project> in the command line. Recompile the design if there are any negative slacks. This problem only affects the timing model for the devices listed. The other Stratix® 10 FPGA devices are not affected. This problem is fixed beginning with version 21.3 of the Quartus® Prime Pro Edition Software.174Views0likes0CommentsCritical Warning(25207): A programming file will not be generated because the assembler identified some pins have missing I/O Standard assignments. Refer to the I/O Assignment Warnings table in the fitter report for details.
Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.3.1 and earlier, you might see this critical warning during the Assembler stage when assigning the I/O Standard to the negative differential pins of the Agilex® 5 FPGA devices and Agilex® 3 FPGA devices. This is due to the I/O Standard of the negative differential pin is not reflected in the Quartus® .qsf file even though the I/O Standard had been assigned to the negative differential pin in the Pin Planner. Resolution To work around this problem, add the assignment below in the .qsf: set_instance_assignment -name IO_STANDARD "<I/O_Standard>" -to "<negative_differential_pin_name>" -entity <entity_name> This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.50Views0likes0Comments